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Dr. Dheeraj Kalra

Dr. Dheeraj Kalra

  • Assistant Professor
    Institute of Engineering & Technology
  • Department

    Department of Computer Engineering & Applications
  • Contact Details:

    Email :

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  • Experience

    16 years of experience

  • Qualifications

    • Ph.D in VLSI Domain (Realizations of Low Noise Amplifier for High Frequency Application using Current Reuse Technique) (July 2019- March 2024) National Institute of Technology (NIT), Jamshedpur CGPA: 7.25/10
    • M.Tech (Electronics & Communication Engineering) (July 2012- June 2014) GLA University, Mathura CGPA: 8.9/10
    • B.E. (Electronics & Communication Engineering) (July 2005- June 2009) Maharshi Dayanand University, Rohtak Percentage: 77.5%
  • Ph.D

    Thesis Supervised

  • Awarded/ Completed-

    Working-

  • Postgraduate

    Thesis Supervised

  • Awarded/ Completed01

    Working-

SCI Journal Articals

  • 01 Dheeraj Kalra and Mayank Srivastava, “Transformer Matching Low Noise Amplifier with Dual-Mode gm Enhancement Technique”, Journal of Electrical Engineering, 2025 (Accepted) (SCI - Indexed)
  • 02 Abhishek Sharma, Dheeraj Kalra, Manish Kumar & Rajiv Bhatia, “Design of CMOS low noise amplifier with inductive degeneration for navigation application”, Journal of Electrical Engineering, Slovak University of Technology, vol. 75, no. 6, pp. 458–466, 2024 (SCI - Indexed)
  • 03 Manish Kumar, Dheeraj Kalra and Aasheesh Shukla, “Mutually Coupled Dual-Stage RC Feedback LNA for RF Applications”, Journal of Electrical Engineering, vol. 75, no. 3, Slovak University of Technology, pp. 198–203, 2024 (SCI - Indexed)
  • 04 Bhardwaj, Kapil, Ravuri Narayana, Dheeraj Kalra, and Mayank Srivastava, “Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension”, Journal of Electrical Engineering, vol. 75, no. 1, pp. 1–7, 2024 (SCI - Indexed)
  • 05 Kumar, Ashish, Arathy Varghese, Dheeraj Kalra, Anshuman Raunak, Mahanth Prasad, Vijay Janyani, and R. P. Yadav, “MEMS-based piezoresistive and capacitive microphones: A review on materials and methods”, Materials Science in Semiconductor Processing, vol. 169, 107879, 2024 (SCI - Indexed)
  • 06 Kumar, Ashish, Swati Paliwal, Dheeraj Kalra, Arathy Varghese, Sudhiranjan Tripathy, and S. K. Ghoshal, “Development of AlGaN/GaN MOSHEMT biosensors: State-of-the-art review and future directions”, Materials Science in Semiconductor Processing, vol. 174, 108225, 2024 (SCI - Indexed)
  • 07 Dheeraj Kalra and Mayank Srivastava, “Design and Optimization of Variable Gain LNA for IoT Applications using Meta-Heuristics Search Algorithms”, Microelectronic Engineering, vol. 286, 112125, 2023 (SCI - Indexed)
  • 08 Dheeraj Kalra, Vishal Goyal, Manish Kumar and Mayank Srivastava, “Mutually Coupled CG-CS Current Reuse Low Noise Amplifier Architecture for 4–14 GHz Frequency”, Journal of Electrical Engineering, vol. 74, no. 3, pp. 177–183, 2023 (SCI - Indexed)
  • 09 Dheeraj Kalra, Vishal Goyal, and Mayank Srivastava, “Quad path, CG-CS resistive feedback LNA architecture for 25–35 GHz band”, Microelectronic Engineering, vol. 279, 112043, 2023 (SCI - Indexed)
  • 10 Dheeraj Kalra, Vishal Goyal, and Mayank Srivastava, “A triple path noise cancellation LNA with transformer output using 45 nm CMOS technology”, Journal of Electrical Engineering, vol. 73, no. 5, pp. 337–342, 2022 (SCI - Indexed)
  • 11 Dheeraj Kalra, Vishal Goyal, and Mayank Srivastava, “Design and performance analysis of low power LNA with variable gain current reuse technique”, Analog Integrated Circuits and Signal Processing, vol. 108, no. 2, pp. 351–361, 2021 (SCI - Indexed)
  • 12 Dheeraj Kalra, Manish Kumar, Aasheesh Shukla, Laxman Singh, & Zainul Abdin Jaffery, “Design analysis of inductorless active loaded low power UWB LNA using noise cancellation technique”, Frequenz Journal, vol. 74, no. 3–4, pp. 137–144, 2020 (SCI - Indexed)

Scopus Journal Articals

  • 01 heeraj Kalra, Pooja Sunil Ahuja, Parag Achaliya, Gayathri Band, Manoj Sakharam Ishi, and Shravan Chandak. "The Role of 5G in Enabling Secure Communication for IoT Devices: Opportunities and Challenges." Library of Progress-Library Science, Information Technology & Computer 44, no. 3 (2024).
  • 02 Kumar, Ashish, Arathy Varghese, Dheeraj Kalra, Sidharth Pancholi, and Gaurav Kumar Sharma."Optimizing Bio-sensor Design with Support Vector Regression Technique for AlGaN/GaN MOSHEMT." IEEE Sensors Letters (2023).

Patents

  • 01 A Device for an Automatic Reminder of Medicine (Application Number: 202111017204, Publication Number: 48/2021)
  • 02 Inductor-less LNA Using Noise Cancellation for UWB (Granted) (Application Number: 202111010187, Publication Number: 13/2021, Patent Number: 511269)
  • 03 Air Quality Monitoring and Purification System (Application Number: 202211056866, Publication Number: 48/2021)
  • 01 Dheeraj Kalra. “A Comprehensive Review on Designing of Low Noise Amplifier for High Frequency.” In 2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT), pp. 1–7. IEEE, 2024.
  • 02 Dheeraj Kalra, Vishal Goyal, and Mayank Srivastava. “LNA Parameters Optimization Using Firefly Algorithm.” In 2023 3rd International Conference on Advancement in Electronics & Communication Engineering (AECE), pp. 94–97. IEEE, 2023.
  • 03 Dheeraj Kalra. “Low Noise Amplifier for High Frequency Applications: A Review.” Materials Today: Proceedings, 2023.
  • 04 Dheeraj Kalra. “A Review on Low-Noise Amplifier for Wideband Applications.” In Proceedings of Second International Conference on Smart Energy and Communication, pp. 417–421. Springer, Singapore, 2021.
  • 05 Dheeraj Kalra. “Realization of CMOS 0.18 µm Low Noise Amplifier for 2–5 GHz Using Cascode-Cascade Topology.” In Recent Advances in Power Electronics and Drives, pp. 243–248. Springer, Singapore, 2021.
  • 06 Dheeraj Kalra, Srivastava, M., Goyal, V., & Kumar, M. “Realization of Low Noise Amplifier for 1–5 GHz Using Noise Cancellation Technique.” In 2020 International Conference on Power Electronics & IoT Applications in Renewable Energy and its Control (PARC), pp. 472–474. IEEE, 2020.
  • 07 Dheeraj Kalra, Kumar, D., & Kumar, D. “Design Analysis of CG-CS LNA for Wideband Applications using Noise Cancellation Technique.” In ICSC 2019, THDC-IHET, Uttarakhand, India. (Scopus indexed - Springer)
  • 08 Kumar, D., Dheeraj Kalra, & Kumar, D. “Design and Analysis of a Multilevel DC–DC Boost Converter.” In ICSC 2019, THDC-IHET, Uttarakhand, India. (Scopus indexed - Springer)
  • 09 Dheeraj Kalra, Kumar, M., & Chaturvedi, A. “Design of High-Gain CG–CS 3.1–10.6 GHz UWB CMOS Low-Noise Amplifier.” In Recent Trends in Communication, Computing, and Electronics, pp. 581–587. Springer, Singapore, 2019.
  • 10 Dheeraj Kalra, Kumar, D., & Chaturvedi, A. “Improved 0.18µm CMOS Down-Conversion Mixer For UWB systems.” In 8th ICCCNT, 2017.
  • 11 Bansal, G., Chaturvedi, A., & Dheeraj Kalra. “High Gain Bulk-Driven Down Conversion Mixer with Improved Noise Figure for UWB System.” In 2nd TEL-NET, pp. 1–4. IEEE, 2017.
  • 12 Kumar, D., & Dheeraj Kalra. “Principal Component Analysis Image Denoising Using Local Pixel Grouping.” In IFUNA, New Delhi, June 2016, pp. 531–536.
  • 13 Kumar, M., Deolia, V.K., & Dheeraj Kalra. “Design and Simulation of LNA Using 0.18μm CMOS Technology for UWB Systems.” In CCIS, IEEE, 2016.
  • 14 A. Sahu, P.C. Sau, & Dheeraj Kalra. “0.18µm CMOS Low Noise Amplifier for Frequency 3.1–5GHz UWB Receivers.” In VCAN, April 2015.
  • 15 A. Sahu, P.C. Sau, & Dheeraj Kalra. “Design of Low Power UWB LNA for Frequency 3.1–5GHz in 0.18µm CMOS Technology.” In ICCCA, pp. 198–201, May 2015.
  • 16 Dheeraj Kalra, Kumar, M., Chaturvedi, A., & Kumar, A. “Design and Simulation of LNA Using 0.18μm CMOS Technology for UWB Systems.” In CCIS, IEEE, pp. 390–392, 2015.
  • 17 Dheeraj Kalra, & A. Chaturvedi. “A 3.1–10.6 GHz CMOS Down-Conversion Mixer for UWB System.” In SPIN, pp. 561–564. IEEE, 2014.

FDP/Short Term Course Attended

  • 01 Attended FDP on “CMOS ICs Methodology of Circuit to Chip Design” organized by Entuple Technology at GLA University, Mathura from 21st – 23rd February 2023.
  • 02 Attended FDP on “Numerical Optimization – A Practical Approach” from 11th – 13th May 2018 held at GLA University, Mathura.
  • 03 Attended Academy Training Program on “VLSI Design Verification” held at MNIT Jaipur during 16th – 20th December 2017.
  • 04 Attended short-term course on “Spectrum Sensing for MIMO-OFDM Cognitive Radio Systems” organized by IIT Kanpur during 21st – 23rd April 2017.
  • 05 Attended FDP on “RF and Microwave Design using Advanced Design System (ADS)” conducted at GLA University, Mathura on 12th – 13th March 2016.
  • 06 Attended FDP on “Advancement in Mobile Communication” conducted at GLA University, Mathura on 16th – 17th October 2015.
  • 07 Attended FDP on Engineering Faculty Workshop conducted at GLA University, Mathura on 24th – 26th February 2015.
  • 08 Completed Mission 10X Aarambh on Effective Teaching and Learning Methods organized by Wipro in 2012.
  • 09 Attended FDP on “Advanced Use of MS Excel in Research Work” at Ramanujan College of Management, Palwal on 19th August 2010.

IEDC (Innovation and Entrepreneurship Development Centre) Project

  • 01 Medint (A Device for an automatic reminder of medicine) (Completed in May 2022) Amount Sanctioned – 1.75 Lac

Technical Skills

  • 01 Research Area: Design of Analog VLSI circuits, Low Noise Amplifiers and Mixer Circuits
  • 02 Subjects Taugh: Electronics Devices and Circuits, Basic Electronics Engineering, Semiconductor Physics, Solid State Devices and Circuits
  • 03 Labs Taken: Simulation Lab based on Cadence Virtuoso, Advance Design System (ADS) and LtSpice Software, Electronics Engineering Lab, Semiconductor Physics Lab
  • 04 Operating Systems: LINUX, WINDOWS
  • 05 Documentation: MS Office
  • 06 Tools: Cadence Virtuoso, Advance Design System, LtSpice, MATLAB, Assura, Calibre,

Administrative Responsiblities

  • 01 Co-ordinator of Electronics and Computer Engineering course.
  • 02 Secretary for the preparation of annual budget of the department.
  • 03 Mentoring students of first year.
  • 04 Time Table In-charge of the Department.
  • 05 Member of Mission Admission Team, Palwal Office.
  • 06 Criteria 4 (Infrastructure and Learning Resources) In-charge for NAAC and NIRF inspection.
  • 07 Electronics Lab In-charge.
  • 08 Worked as Organizer in International Conferences CICN-2012 (IEEE), CICN-2013 (IEEE), CCIS-2015 (IEEE), CCIS-2016 (IEEE), ICCAI-2021 (Springer), ICAMSMD-2022 (Elsevier), and CCIS-2024 held at GLA University, Mathura. Also working as Publication Chair for the conference CCIS-2024.

Experience

  • 01 (August 2011- Till Date) Assistant Professor

    Activity field Employer: Teaching undergraduate and post graduate students GLA University, Mathura, U.P.

  • 02 (October 2009- August 2011) Teaching Assistant

    Activity field Employer: Teaching undergraduate students SCET Palwal, Haryana

Awards & Achievements

  • 01 Qualified GATE in the years 2011, 2012, and 2014.
  • 02 Supervised UG and PG dissertations on Mixer Design and Low Noise Amplifier Design using 180 nm CMOS Technology.
  • 03 Reviewed articles in journals such as Analog Integrated Circuit and Signal Processing, Wireless Communication System – Wiley, and Transactions on Microwave Theory and Techniques.
  • 04 Received Appreciation Certificate from GLA University for significant research contribution in the academic session 2019–20.
  • 05 Received Appreciation Certificate from GLA University for excellence in classroom teaching for the year 2022.
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